2021-05-20 10:49:33 +00:00
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// Copyright 2009-2021 Intel Corporation
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2021-04-20 16:38:09 +00:00
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// SPDX-License-Identifier: Apache-2.0
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#pragma once
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#include <atomic>
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#include "intrinsics.h"
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namespace embree
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{
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/* compiler memory barriers */
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#if defined(__INTEL_COMPILER)
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//#define __memory_barrier() __memory_barrier()
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#elif defined(__GNUC__) || defined(__clang__)
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# define __memory_barrier() asm volatile("" ::: "memory")
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#elif defined(_MSC_VER)
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# define __memory_barrier() _ReadWriteBarrier()
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#endif
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template <typename T>
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struct atomic : public std::atomic<T>
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{
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atomic () {}
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atomic (const T& a)
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: std::atomic<T>(a) {}
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atomic (const atomic<T>& a) {
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this->store(a.load());
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}
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atomic& operator=(const atomic<T>& other) {
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this->store(other.load());
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return *this;
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}
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};
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template<typename T>
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__forceinline void atomic_min(std::atomic<T>& aref, const T& bref)
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{
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const T b = bref.load();
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while (true) {
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T a = aref.load();
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if (a <= b) break;
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if (aref.compare_exchange_strong(a,b)) break;
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}
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}
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template<typename T>
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__forceinline void atomic_max(std::atomic<T>& aref, const T& bref)
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{
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const T b = bref.load();
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while (true) {
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T a = aref.load();
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if (a >= b) break;
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if (aref.compare_exchange_strong(a,b)) break;
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}
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}
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}
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