Merge pull request #91941 from akien-mga/astcenc-4.8.0
astcenc: Update to 4.8.0
This commit is contained in:
commit
1c166b40a2
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@ -47,7 +47,7 @@ Files extracted from upstream source:
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## astcenc
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- Upstream: https://github.com/ARM-software/astc-encoder
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- Version: 4.7.0 (1a51f2915121275038677317c8bf61f1a78b590c, 2024)
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- Version: 4.8.0 (0d6c9047c5ad19640e2d60fdb8f11a16675e7938, 2024)
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- License: Apache 2.0
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Files extracted from upstream source:
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@ -1167,7 +1167,7 @@ astcenc_error astcenc_decompress_image(
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return ASTCENC_ERR_OUT_OF_MEM;
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}
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image_block blk;
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image_block blk {};
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blk.texel_count = static_cast<uint8_t>(block_x * block_y * block_z);
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// Decode mode inferred from the output data type
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: Apache-2.0
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// ----------------------------------------------------------------------------
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// Copyright 2011-2021 Arm Limited
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// Copyright 2011-2024 Arm Limited
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//
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// Licensed under the Apache License, Version 2.0 (the "License"); you may not
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// use this file except in compliance with the License. You may obtain a copy
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@ -464,10 +464,10 @@ static inline void write_bits(
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}
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/**
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* @brief Read up to 8 bits at an arbitrary bit offset.
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* @brief Read up to 16 bits from two bytes.
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*
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* The stored value is at most 8 bits, but can be stored at an offset of between 0 and 7 bits so may
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* span two separate bytes in memory.
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* This function reads a packed N-bit field from two bytes in memory. The stored value must exist
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* within the two bytes, but can start at an arbitary bit offset and span the two bytes in memory.
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*
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* @param bitcount The number of bits to read.
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* @param bitoffset The bit offset to read from, between 0 and 7.
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@ -326,10 +326,10 @@ struct partition_info
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uint8_t partition_texel_count[BLOCK_MAX_PARTITIONS];
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/** @brief The partition of each texel in the block. */
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uint8_t partition_of_texel[BLOCK_MAX_TEXELS];
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ASTCENC_ALIGNAS uint8_t partition_of_texel[BLOCK_MAX_TEXELS];
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/** @brief The list of texels in each partition. */
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uint8_t texels_of_partition[BLOCK_MAX_PARTITIONS][BLOCK_MAX_TEXELS];
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ASTCENC_ALIGNAS uint8_t texels_of_partition[BLOCK_MAX_PARTITIONS][BLOCK_MAX_TEXELS];
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};
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/**
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@ -367,19 +367,19 @@ struct decimation_info
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* @brief The number of weights that contribute to each texel.
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* Value is between 1 and 4.
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*/
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uint8_t texel_weight_count[BLOCK_MAX_TEXELS];
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ASTCENC_ALIGNAS uint8_t texel_weight_count[BLOCK_MAX_TEXELS];
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/**
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* @brief The weight index of the N weights that are interpolated for each texel.
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* Stored transposed to improve vectorization.
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*/
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uint8_t texel_weights_tr[4][BLOCK_MAX_TEXELS];
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ASTCENC_ALIGNAS uint8_t texel_weights_tr[4][BLOCK_MAX_TEXELS];
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/**
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* @brief The bilinear contribution of the N weights that are interpolated for each texel.
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* Value is between 0 and 16, stored transposed to improve vectorization.
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*/
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uint8_t texel_weight_contribs_int_tr[4][BLOCK_MAX_TEXELS];
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ASTCENC_ALIGNAS uint8_t texel_weight_contribs_int_tr[4][BLOCK_MAX_TEXELS];
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/**
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* @brief The bilinear contribution of the N weights that are interpolated for each texel.
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@ -388,13 +388,13 @@ struct decimation_info
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ASTCENC_ALIGNAS float texel_weight_contribs_float_tr[4][BLOCK_MAX_TEXELS];
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/** @brief The number of texels that each stored weight contributes to. */
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uint8_t weight_texel_count[BLOCK_MAX_WEIGHTS];
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ASTCENC_ALIGNAS uint8_t weight_texel_count[BLOCK_MAX_WEIGHTS];
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/**
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* @brief The list of texels that use a specific weight index.
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* Stored transposed to improve vectorization.
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*/
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uint8_t weight_texels_tr[BLOCK_MAX_TEXELS][BLOCK_MAX_WEIGHTS];
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ASTCENC_ALIGNAS uint8_t weight_texels_tr[BLOCK_MAX_TEXELS][BLOCK_MAX_WEIGHTS];
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/**
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* @brief The bilinear contribution to the N texels that use each weight.
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@ -732,7 +732,11 @@ struct block_size_descriptor
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*
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* The @c data_[rgba] fields store the image data in an encoded SoA float form designed for easy
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* vectorization. Input data is converted to float and stored as values between 0 and 65535. LDR
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* data is stored as direct UNORM data, HDR data is stored as LNS data.
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* data is stored as direct UNORM data, HDR data is stored as LNS data. They are allocated SIMD
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* elements over-size to allow vectorized stores of unaligned and partial SIMD lanes (e.g. in a
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* 6x6x6 block the final row write will read elements 210-217 (vec8) or 214-217 (vec4), which is
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* two elements above the last real data element). The overspill values are never written to memory,
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* and would be benign, but the padding avoids hitting undefined behavior.
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*
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* The @c rgb_lns and @c alpha_lns fields that assigned a per-texel use of HDR are only used during
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* decompression. The current compressor will always use HDR endpoint formats when in HDR mode.
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@ -740,16 +744,16 @@ struct block_size_descriptor
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struct image_block
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{
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/** @brief The input (compress) or output (decompress) data for the red color component. */
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ASTCENC_ALIGNAS float data_r[BLOCK_MAX_TEXELS];
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ASTCENC_ALIGNAS float data_r[BLOCK_MAX_TEXELS + ASTCENC_SIMD_WIDTH - 1];
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/** @brief The input (compress) or output (decompress) data for the green color component. */
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ASTCENC_ALIGNAS float data_g[BLOCK_MAX_TEXELS];
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ASTCENC_ALIGNAS float data_g[BLOCK_MAX_TEXELS + ASTCENC_SIMD_WIDTH - 1];
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/** @brief The input (compress) or output (decompress) data for the blue color component. */
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ASTCENC_ALIGNAS float data_b[BLOCK_MAX_TEXELS];
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ASTCENC_ALIGNAS float data_b[BLOCK_MAX_TEXELS + ASTCENC_SIMD_WIDTH - 1];
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/** @brief The input (compress) or output (decompress) data for the alpha color component. */
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ASTCENC_ALIGNAS float data_a[BLOCK_MAX_TEXELS];
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ASTCENC_ALIGNAS float data_a[BLOCK_MAX_TEXELS + ASTCENC_SIMD_WIDTH - 1];
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/** @brief The number of texels in the block. */
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uint8_t texel_count;
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@ -957,7 +961,7 @@ struct ASTCENC_ALIGNAS compression_working_buffers
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*
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* For two planes, second plane starts at @c WEIGHTS_PLANE2_OFFSET offsets.
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*/
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uint8_t dec_weights_uquant[WEIGHTS_MAX_BLOCK_MODES * BLOCK_MAX_WEIGHTS];
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ASTCENC_ALIGNAS uint8_t dec_weights_uquant[WEIGHTS_MAX_BLOCK_MODES * BLOCK_MAX_WEIGHTS];
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/** @brief Error of the best encoding combination for each block mode. */
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ASTCENC_ALIGNAS float errors_of_best_combination[WEIGHTS_MAX_BLOCK_MODES];
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@ -1111,7 +1115,7 @@ struct symbolic_compressed_block
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*
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* If dual plane, the second plane starts at @c weights[WEIGHTS_PLANE2_OFFSET].
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*/
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uint8_t weights[BLOCK_MAX_WEIGHTS];
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ASTCENC_ALIGNAS uint8_t weights[BLOCK_MAX_WEIGHTS];
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/**
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* @brief Get the weight quantization used by this block mode.
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@ -150,6 +150,7 @@ public:
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m_start_count = 0;
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m_done_count = 0;
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m_task_count = 0;
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m_callback = nullptr;
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m_callback_last_value = 0.0f;
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m_callback_min_diff = 1.0f;
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}
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@ -330,12 +330,14 @@ void physical_to_symbolic(
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return;
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}
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// Low values span 3 bytes so need two read_bits calls
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int vx_low_s = read_bits(8, 12, pcb) | (read_bits(5, 12 + 8, pcb) << 8);
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int vx_high_s = read_bits(8, 25, pcb) | (read_bits(5, 25 + 8, pcb) << 8);
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int vx_high_s = read_bits(13, 25, pcb);
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int vx_low_t = read_bits(8, 38, pcb) | (read_bits(5, 38 + 8, pcb) << 8);
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int vx_high_t = read_bits(8, 51, pcb) | (read_bits(5, 51 + 8, pcb) << 8);
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int vx_high_t = read_bits(13, 51, pcb);
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int all_ones = vx_low_s == 0x1FFF && vx_high_s == 0x1FFF && vx_low_t == 0x1FFF && vx_high_t == 0x1FFF;
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int all_ones = vx_low_s == 0x1FFF && vx_high_s == 0x1FFF &&
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vx_low_t == 0x1FFF && vx_high_t == 0x1FFF;
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if ((vx_low_s >= vx_high_s || vx_low_t >= vx_high_t) && !all_ones)
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{
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@ -350,12 +352,14 @@ void physical_to_symbolic(
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int vx_high_s = read_bits(9, 19, pcb);
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int vx_low_t = read_bits(9, 28, pcb);
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int vx_high_t = read_bits(9, 37, pcb);
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int vx_low_p = read_bits(9, 46, pcb);
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int vx_high_p = read_bits(9, 55, pcb);
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int vx_low_r = read_bits(9, 46, pcb);
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int vx_high_r = read_bits(9, 55, pcb);
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int all_ones = vx_low_s == 0x1FF && vx_high_s == 0x1FF && vx_low_t == 0x1FF && vx_high_t == 0x1FF && vx_low_p == 0x1FF && vx_high_p == 0x1FF;
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int all_ones = vx_low_s == 0x1FF && vx_high_s == 0x1FF &&
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vx_low_t == 0x1FF && vx_high_t == 0x1FF &&
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vx_low_r == 0x1FF && vx_high_r == 0x1FF;
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if ((vx_low_s >= vx_high_s || vx_low_t >= vx_high_t || vx_low_p >= vx_high_p) && !all_ones)
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if ((vx_low_s >= vx_high_s || vx_low_t >= vx_high_t || vx_low_r >= vx_high_r) && !all_ones)
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{
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scb.block_type = SYM_BTYPE_ERROR;
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return;
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@ -470,8 +474,7 @@ void physical_to_symbolic(
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bitpos += 2;
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}
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}
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scb.partition_index = static_cast<uint16_t>(read_bits(6, 13, pcb) |
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(read_bits(PARTITION_INDEX_BITS - 6, 19, pcb) << 6));
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scb.partition_index = static_cast<uint16_t>(read_bits(10, 13, pcb));
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}
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for (int i = 0; i < partition_count; i++)
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: Apache-2.0
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// ----------------------------------------------------------------------------
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// Copyright 2019-2023 Arm Limited
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// Copyright 2019-2024 Arm Limited
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//
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// Licensed under the Apache License, Version 2.0 (the "License"); you may not
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// use this file except in compliance with the License. You may obtain a copy
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@ -556,10 +556,16 @@ ASTCENC_SIMD_INLINE vmask4 operator>(vint4 a, vint4 b)
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*/
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template <int s> ASTCENC_SIMD_INLINE vint4 lsl(vint4 a)
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{
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return vint4(a.m[0] << s,
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a.m[1] << s,
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a.m[2] << s,
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a.m[3] << s);
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// Cast to unsigned to avoid shift in/out of sign bit undefined behavior
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unsigned int as0 = static_cast<unsigned int>(a.m[0]) << s;
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unsigned int as1 = static_cast<unsigned int>(a.m[1]) << s;
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unsigned int as2 = static_cast<unsigned int>(a.m[2]) << s;
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unsigned int as3 = static_cast<unsigned int>(a.m[3]) << s;
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return vint4(static_cast<int>(as0),
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static_cast<int>(as1),
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static_cast<int>(as2),
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static_cast<int>(as3));
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}
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/**
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@ -567,6 +573,7 @@ template <int s> ASTCENC_SIMD_INLINE vint4 lsl(vint4 a)
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*/
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template <int s> ASTCENC_SIMD_INLINE vint4 lsr(vint4 a)
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{
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// Cast to unsigned to avoid shift in/out of sign bit undefined behavior
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unsigned int as0 = static_cast<unsigned int>(a.m[0]) >> s;
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unsigned int as1 = static_cast<unsigned int>(a.m[1]) >> s;
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unsigned int as2 = static_cast<unsigned int>(a.m[2]) >> s;
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