Fix issues with Vulkan layout transitions
(cherry picked from commit 882b869220
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289d551fbb
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4c8946c080
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@ -8115,10 +8115,67 @@ void RenderingDeviceVulkan::compute_list_dispatch_indirect(ComputeListID p_list,
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}
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}
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void RenderingDeviceVulkan::compute_list_add_barrier(ComputeListID p_list) {
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void RenderingDeviceVulkan::compute_list_add_barrier(ComputeListID p_list) {
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uint32_t barrier_flags = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT;
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uint32_t access_flags = VK_ACCESS_SHADER_READ_BIT;
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_compute_list_add_barrier(BARRIER_MASK_COMPUTE, barrier_flags, access_flags);
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}
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void RenderingDeviceVulkan::_compute_list_add_barrier(BitField<BarrierMask> p_post_barrier, uint32_t p_barrier_flags, uint32_t p_access_flags) {
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ERR_FAIL_COND(!compute_list);
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VkImageMemoryBarrier *image_barriers = nullptr;
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uint32_t image_barrier_count = compute_list->state.textures_to_sampled_layout.size();
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if (image_barrier_count) {
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image_barriers = (VkImageMemoryBarrier *)alloca(sizeof(VkImageMemoryBarrier) * image_barrier_count);
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}
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image_barrier_count = 0; // We'll count how many we end up issuing.
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for (Texture *E : compute_list->state.textures_to_sampled_layout) {
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if (E->layout != VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL) {
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VkImageMemoryBarrier &image_memory_barrier = image_barriers[image_barrier_count++];
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image_memory_barrier.sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER;
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image_memory_barrier.pNext = nullptr;
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image_memory_barrier.srcAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT;
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image_memory_barrier.dstAccessMask = p_access_flags;
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image_memory_barrier.oldLayout = E->layout;
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image_memory_barrier.newLayout = VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL;
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image_memory_barrier.srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED;
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image_memory_barrier.dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED;
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image_memory_barrier.image = E->image;
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image_memory_barrier.subresourceRange.aspectMask = E->read_aspect_mask;
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image_memory_barrier.subresourceRange.baseMipLevel = E->base_mipmap;
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image_memory_barrier.subresourceRange.levelCount = E->mipmaps;
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image_memory_barrier.subresourceRange.baseArrayLayer = E->base_layer;
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image_memory_barrier.subresourceRange.layerCount = E->layers;
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E->layout = VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL;
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}
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if (E->used_in_frame != frames_drawn) {
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E->used_in_transfer = false;
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E->used_in_raster = false;
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E->used_in_compute = false;
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E->used_in_frame = frames_drawn;
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}
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}
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if (p_barrier_flags) {
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VkMemoryBarrier mem_barrier;
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mem_barrier.sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER;
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mem_barrier.pNext = nullptr;
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mem_barrier.srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT;
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mem_barrier.dstAccessMask = p_access_flags;
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vkCmdPipelineBarrier(compute_list->command_buffer, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, p_barrier_flags, 0, 1, &mem_barrier, 0, nullptr, image_barrier_count, image_barriers);
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} else if (image_barrier_count) {
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vkCmdPipelineBarrier(compute_list->command_buffer, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT, 0, 0, nullptr, 0, nullptr, image_barrier_count, image_barriers);
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}
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#ifdef FORCE_FULL_BARRIER
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#ifdef FORCE_FULL_BARRIER
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_full_barrier(true);
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_full_barrier(true);
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#else
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_memory_barrier(VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, VK_ACCESS_SHADER_WRITE_BIT, VK_ACCESS_SHADER_READ_BIT, true);
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#endif
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#endif
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}
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}
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@ -8139,62 +8196,7 @@ void RenderingDeviceVulkan::compute_list_end(BitField<BarrierMask> p_post_barrie
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barrier_flags |= VK_PIPELINE_STAGE_TRANSFER_BIT;
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barrier_flags |= VK_PIPELINE_STAGE_TRANSFER_BIT;
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access_flags |= VK_ACCESS_TRANSFER_WRITE_BIT | VK_ACCESS_TRANSFER_READ_BIT;
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access_flags |= VK_ACCESS_TRANSFER_WRITE_BIT | VK_ACCESS_TRANSFER_READ_BIT;
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}
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}
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_compute_list_add_barrier(p_post_barrier, barrier_flags, access_flags);
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if (barrier_flags == 0) {
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barrier_flags = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT;
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}
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VkImageMemoryBarrier *image_barriers = nullptr;
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uint32_t image_barrier_count = compute_list->state.textures_to_sampled_layout.size();
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if (image_barrier_count) {
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image_barriers = (VkImageMemoryBarrier *)alloca(sizeof(VkImageMemoryBarrier) * image_barrier_count);
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}
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uint32_t barrier_idx = 0;
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for (Texture *E : compute_list->state.textures_to_sampled_layout) {
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VkImageMemoryBarrier &image_memory_barrier = image_barriers[barrier_idx++];
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image_memory_barrier.sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER;
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image_memory_barrier.pNext = nullptr;
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image_memory_barrier.srcAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT;
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image_memory_barrier.dstAccessMask = access_flags;
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image_memory_barrier.oldLayout = E->layout;
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image_memory_barrier.newLayout = VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL;
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image_memory_barrier.srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED;
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image_memory_barrier.dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED;
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image_memory_barrier.image = E->image;
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image_memory_barrier.subresourceRange.aspectMask = E->read_aspect_mask;
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image_memory_barrier.subresourceRange.baseMipLevel = E->base_mipmap;
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image_memory_barrier.subresourceRange.levelCount = E->mipmaps;
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image_memory_barrier.subresourceRange.baseArrayLayer = E->base_layer;
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image_memory_barrier.subresourceRange.layerCount = E->layers;
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E->layout = VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL;
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if (E->used_in_frame != frames_drawn) {
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E->used_in_transfer = false;
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E->used_in_raster = false;
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E->used_in_compute = false;
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E->used_in_frame = frames_drawn;
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}
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}
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VkMemoryBarrier mem_barrier;
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mem_barrier.sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER;
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mem_barrier.pNext = nullptr;
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mem_barrier.srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT;
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mem_barrier.dstAccessMask = access_flags;
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if (image_barrier_count > 0 || p_post_barrier != BARRIER_MASK_NO_BARRIER) {
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vkCmdPipelineBarrier(compute_list->command_buffer, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, barrier_flags, 0, 1, &mem_barrier, 0, nullptr, image_barrier_count, image_barriers);
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}
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#ifdef FORCE_FULL_BARRIER
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_full_barrier(true);
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#endif
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memdelete(compute_list);
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memdelete(compute_list);
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compute_list = nullptr;
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compute_list = nullptr;
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@ -954,6 +954,8 @@ class RenderingDeviceVulkan : public RenderingDevice {
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ComputeList *compute_list = nullptr;
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ComputeList *compute_list = nullptr;
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void _compute_list_add_barrier(BitField<BarrierMask> p_post_barrier, uint32_t p_barrier_flags, uint32_t p_access_flags);
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/**************************/
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/**************************/
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/**** FRAME MANAGEMENT ****/
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/**** FRAME MANAGEMENT ****/
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/**************************/
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/**************************/
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