193 lines
6.0 KiB
C++
193 lines
6.0 KiB
C++
// Copyright 2009-2020 Intel Corporation
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// SPDX-License-Identifier: Apache-2.0
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#pragma once
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#define CACHELINE_SIZE 64
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#if !defined(PAGE_SIZE)
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#define PAGE_SIZE 4096
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#endif
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#define PAGE_SIZE_2M (2*1024*1024)
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#define PAGE_SIZE_4K (4*1024)
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#include "platform.h"
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/* define isa namespace and ISA bitvector */
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#if defined (__AVX512VL__)
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# define isa avx512skx
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# define ISA AVX512SKX
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# define ISA_STR "AVX512SKX"
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#elif defined (__AVX512F__)
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# define isa avx512knl
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# define ISA AVX512KNL
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# define ISA_STR "AVX512KNL"
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#elif defined (__AVX2__)
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# define isa avx2
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# define ISA AVX2
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# define ISA_STR "AVX2"
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#elif defined(__AVXI__)
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# define isa avxi
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# define ISA AVXI
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# define ISA_STR "AVXI"
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#elif defined(__AVX__)
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# define isa avx
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# define ISA AVX
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# define ISA_STR "AVX"
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#elif defined (__SSE4_2__)
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# define isa sse42
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# define ISA SSE42
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# define ISA_STR "SSE4.2"
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//#elif defined (__SSE4_1__) // we demote this to SSE2, MacOSX code compiles with SSE41 by default with XCode 11
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//# define isa sse41
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//# define ISA SSE41
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//# define ISA_STR "SSE4.1"
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//#elif defined(__SSSE3__) // we demote this to SSE2, MacOSX code compiles with SSSE3 by default with ICC
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//# define isa ssse3
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//# define ISA SSSE3
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//# define ISA_STR "SSSE3"
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//#elif defined(__SSE3__) // we demote this to SSE2, MacOSX code compiles with SSE3 by default with clang
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//# define isa sse3
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//# define ISA SSE3
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//# define ISA_STR "SSE3"
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#elif defined(__SSE2__) || defined(__SSE3__) || defined(__SSSE3__)
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# define isa sse2
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# define ISA SSE2
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# define ISA_STR "SSE2"
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#elif defined(__SSE__)
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# define isa sse
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# define ISA SSE
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# define ISA_STR "SSE"
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#elif defined(__ARM_NEON)
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// NOTE(LTE): Use sse2 for `isa` for the compatibility at the moment.
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#define isa sse2
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#define ISA NEON
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#define ISA_STR "NEON"
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#else
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#error Unknown ISA
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#endif
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namespace embree
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{
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enum class CPU
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{
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XEON_ICE_LAKE,
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CORE_ICE_LAKE,
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CORE_TIGER_LAKE,
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CORE_COMET_LAKE,
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CORE_CANNON_LAKE,
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CORE_KABY_LAKE,
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XEON_SKY_LAKE,
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CORE_SKY_LAKE,
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XEON_PHI_KNIGHTS_MILL,
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XEON_PHI_KNIGHTS_LANDING,
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XEON_BROADWELL,
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CORE_BROADWELL,
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XEON_HASWELL,
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CORE_HASWELL,
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XEON_IVY_BRIDGE,
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CORE_IVY_BRIDGE,
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SANDY_BRIDGE,
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NEHALEM,
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CORE2,
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CORE1,
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ARM,
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UNKNOWN,
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};
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/*! get the full path to the running executable */
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std::string getExecutableFileName();
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/*! return platform name */
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std::string getPlatformName();
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/*! get the full name of the compiler */
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std::string getCompilerName();
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/*! return the name of the CPU */
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std::string getCPUVendor();
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/*! get microprocessor model */
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CPU getCPUModel();
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/*! converts CPU model into string */
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std::string stringOfCPUModel(CPU model);
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/*! CPU features */
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static const int CPU_FEATURE_SSE = 1 << 0;
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static const int CPU_FEATURE_SSE2 = 1 << 1;
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static const int CPU_FEATURE_SSE3 = 1 << 2;
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static const int CPU_FEATURE_SSSE3 = 1 << 3;
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static const int CPU_FEATURE_SSE41 = 1 << 4;
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static const int CPU_FEATURE_SSE42 = 1 << 5;
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static const int CPU_FEATURE_POPCNT = 1 << 6;
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static const int CPU_FEATURE_AVX = 1 << 7;
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static const int CPU_FEATURE_F16C = 1 << 8;
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static const int CPU_FEATURE_RDRAND = 1 << 9;
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static const int CPU_FEATURE_AVX2 = 1 << 10;
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static const int CPU_FEATURE_FMA3 = 1 << 11;
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static const int CPU_FEATURE_LZCNT = 1 << 12;
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static const int CPU_FEATURE_BMI1 = 1 << 13;
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static const int CPU_FEATURE_BMI2 = 1 << 14;
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static const int CPU_FEATURE_AVX512F = 1 << 16;
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static const int CPU_FEATURE_AVX512DQ = 1 << 17;
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static const int CPU_FEATURE_AVX512PF = 1 << 18;
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static const int CPU_FEATURE_AVX512ER = 1 << 19;
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static const int CPU_FEATURE_AVX512CD = 1 << 20;
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static const int CPU_FEATURE_AVX512BW = 1 << 21;
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static const int CPU_FEATURE_AVX512VL = 1 << 22;
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static const int CPU_FEATURE_AVX512IFMA = 1 << 23;
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static const int CPU_FEATURE_AVX512VBMI = 1 << 24;
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static const int CPU_FEATURE_XMM_ENABLED = 1 << 25;
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static const int CPU_FEATURE_YMM_ENABLED = 1 << 26;
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static const int CPU_FEATURE_ZMM_ENABLED = 1 << 27;
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static const int CPU_FEATURE_NEON = 1 << 28;
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static const int CPU_FEATURE_NEON_2X = 1 << 29;
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/*! get CPU features */
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int getCPUFeatures();
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/*! convert CPU features into a string */
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std::string stringOfCPUFeatures(int features);
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/*! creates a string of all supported targets that are supported */
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std::string supportedTargetList (int isa);
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/*! ISAs */
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static const int SSE = CPU_FEATURE_SSE | CPU_FEATURE_XMM_ENABLED;
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static const int SSE2 = SSE | CPU_FEATURE_SSE2;
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static const int SSE3 = SSE2 | CPU_FEATURE_SSE3;
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static const int SSSE3 = SSE3 | CPU_FEATURE_SSSE3;
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static const int SSE41 = SSSE3 | CPU_FEATURE_SSE41;
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static const int SSE42 = SSE41 | CPU_FEATURE_SSE42 | CPU_FEATURE_POPCNT;
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static const int AVX = SSE42 | CPU_FEATURE_AVX | CPU_FEATURE_YMM_ENABLED;
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static const int AVXI = AVX | CPU_FEATURE_F16C | CPU_FEATURE_RDRAND;
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static const int AVX2 = AVXI | CPU_FEATURE_AVX2 | CPU_FEATURE_FMA3 | CPU_FEATURE_BMI1 | CPU_FEATURE_BMI2 | CPU_FEATURE_LZCNT;
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static const int AVX512KNL = AVX2 | CPU_FEATURE_AVX512F | CPU_FEATURE_AVX512PF | CPU_FEATURE_AVX512ER | CPU_FEATURE_AVX512CD | CPU_FEATURE_ZMM_ENABLED;
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static const int AVX512SKX = AVX2 | CPU_FEATURE_AVX512F | CPU_FEATURE_AVX512DQ | CPU_FEATURE_AVX512CD | CPU_FEATURE_AVX512BW | CPU_FEATURE_AVX512VL | CPU_FEATURE_ZMM_ENABLED;
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static const int NEON = CPU_FEATURE_NEON | CPU_FEATURE_SSE | CPU_FEATURE_SSE2;
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static const int NEON_2X = CPU_FEATURE_NEON_2X | AVX2;
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/*! converts ISA bitvector into a string */
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std::string stringOfISA(int features);
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/*! return the number of logical threads of the system */
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unsigned int getNumberOfLogicalThreads();
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/*! returns the size of the terminal window in characters */
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int getTerminalWidth();
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/*! returns performance counter in seconds */
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double getSeconds();
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/*! sleeps the specified number of seconds */
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void sleepSeconds(double t);
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/*! returns virtual address space occupied by process */
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size_t getVirtualMemoryBytes();
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/*! returns resident memory required by process */
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size_t getResidentMemoryBytes();
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}
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